HW Interview
EM-02 · Chapter 8 · Low-Speed Interfaces & Embedded Hardware

Sizing I²C pull-ups

How do you size I²C pull-up resistors?

Level●● onsite technical
TrackEmbedded & wearables
Really testingThe rise-time vs sink-current window.

Free full answer — one of 12 questions answered in full on this site.

Think first. Before you read on: what happens to the rising edge if the resistor is too large? What happens to the low level if it is too small? Each one gives you a limit.
Show the answer

Say this first: Between two limits. Max R from the rise-time spec: Rp ≤ t_r/(0.8473·C_bus) (t_r = 1000 ns at 100 kHz, 300 ns at 400 kHz, 120 ns at 1 MHz). Min R from the drivers' sink current: Rp ≥ (VDD − 0.4 V)/3 mA (20 mA for Fast-mode Plus).

Numbers: 400 kHz, 200 pF → Rp ≤ 1.77 kΩ; at 3.3 V Rp ≥ 967 Ω → pick 1.2–1.5 kΩ. At 100 kHz, 100 pF → Rp ≤ 11.8 kΩ → 4.7 kΩ is typical.

Too much capacitance? Lower the speed, split the bus, or add a buffer/active pull-up.

Common mistake. "4.7 kΩ, always." On a 400 kHz bus with 200 pF at 3.3 V the window is about 1.0–1.8 kΩ, and 4.7 kΩ is far outside it.

Try it

I²C pull-up window — free tool →

Going deeper

Where 0.8473 comes from. The spec measures rise time from 30% to 70% of VDD. On an RC charge, t = RC·ln(0.7/0.3) = 0.8473·RC.

Estimating C_bus before the board exists. About 10 pF per device pin, plus roughly 1–2 pF per cm of trace, plus connectors and cable. Example: 6 devices and 20 cm of trace ≈ 60 + 30 = 90 pF.

Measuring it. Scope the rising edge and read the 30–70% time; C_bus ≈ t/(0.8473·Rp). A 10× probe adds about 10 pF — include it.

Where people go wrong

Try it: I²C pull-up window

More like this in the book

This is EM-02 from Hardware Engineer Interview Questions. The book has 12 questions on low-speed interfaces & embedded hardware and 141 in all, each answered the same way: what to say first, how to explain it, the numbers worth quoting and the follow-ups that come next.

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